182 lines
8.4 KiB
Plaintext
182 lines
8.4 KiB
Plaintext
######################
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set_design_top sy13
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set_scope .
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################################
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#######create power domain
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#################################
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# ae210_chip is power_domian 1
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# sys_top is power_domain 2
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#
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create_power_domain PD_TOP -include_scope
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create_power_domain PD_sys -elements {u_mcu/u_sys_top}
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create_power_domain PD_ae210 -elements {ae210_chip/ae210_core}
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####################
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###create_power_supply port
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##################
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create_supply_port PORT_VCC -domain PD_TOP -direction in
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create_supply_port PORT_VSS -domain PD_TOP -direction in
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####################
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###create_power_supply net
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##################
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create_supply_net NET_VCC -domain PD_TOP
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create_supply_net NET_VSS -domain PD_TOP
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create_supply_net NET_VCC_sys -domain PD_sys
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create_supply_net NET_VSS -domain PD_sys -reuse
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create_supply_net NET_VCC -domain PD_sys -reuse
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create_supply_net NET_VCC_ae210 -domain PD_ae210
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create_supply_net NET_VSS -domain PD_ae210 -reuse
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create_supply_net NET_VCC -domain PD_ae210 -reuse
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#####################
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#connect power supplu net with power supply port
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#####################
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connect_supply_net NET_VCC -ports {PORT_VCC}
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connect_supply_net NET_VSS -ports {PORT_VSS}
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#####################
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#set domain supply net
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#####################
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set_domain_supply_net PD_TOP -primary_power_net {NET_VCC} -primary_ground_net {NET_VSS}
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set_domain_supply_net PD_sys -primary_power_net {NET_VCC_sys} -primary_ground_net {NET_VSS}
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set_domain_supply_net PD_ae210 -primary_power_net {NET_VCC_ae210} -primary_ground_net {NET_VSS}
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##########################
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#create power switch
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##########################
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create_power_switch sw_ae210 -domain PD_ae210 \
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-input_supply_port {in_port NET_VCC } \
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-output_supply_port {out_port NET_VCC_ae210 } \
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-control_port {ctrl_port u_mcu/u_aoss_wrap/N10PwrReq } \
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-ack_port {ack_port u_mcu/u_aoss_wrap/N10PwrAck {ctrl_port}} \
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-on_state {ON in_port {ctrl_port}} \
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-off_state {OFF {!ctrl_port}}
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create_power_switch sw_sys -domain PD_sys \
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-input_supply_port {in_port NET_VCC } \
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-output_supply_port {out_port NET_VCC_sys } \
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-control_port {ctrl_port u_mcu/u_aoss_wrap/sp_pwroff_req } \
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-ack_port {ack_port u_mcu/u_aoss_wrap/sp_pwroff_ack {ctrl_port}} \
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-on_state {ON in_port {ctrl_port}} \
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-off_state {OFF {!ctrl_port}}
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############################
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#map power switch
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##############
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#map_power_switch sw_sys -domain PD_sys -lib_cells {PEH_PGATDRV_OW_12}
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#map_power_switch sw_ae210 -domain PD_ae210 -lib_cells {PEH_PGATDRV_OW_12}
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###############################
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#creat_isolation_cell
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#######################
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################################
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set_isolation PD_sys_clamp_low -domain PD_sys \
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-clamp_value 0 \
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-applies_to outputs \
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-elements { \
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u_mcu/u_sys_top/rst_pmu \
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u_mcu/u_sys_top/HSELahb2n10 \
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u_mcu/u_sys_top/HADDRahb2pmu_async \
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u_mcu/u_sys_top/HTRANSahb2pmu_async \
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u_mcu/u_sys_top/HWRITEahb2pmu_async \
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u_mcu/u_sys_top/HSIZEahb2pmu_async \
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u_mcu/u_sys_top/HBURSTahb2pmu_async \
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u_mcu/u_sys_top/HPROTahb2pmu_async \
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u_mcu/u_sys_top/HMASTERahb2pmu_async \
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u_mcu/u_sys_top/HWDATAahb2pmu_async \
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u_mcu/u_sys_top/HMASTERahb2cm0_async \
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u_mcu/u_sys_top/test_en \
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u_mcu/u_sys_top/scan_en \
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u_mcu/u_sys_top/scan_mode \
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u_mcu/u_sys_top/ana_mode \
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} \
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-isolation_power_net NET_VCC \
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-isolation_ground_net NET_VSS
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set_isolation_control PD_sys_clamp_low -domain PD_sys \
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-isolation_signal {u_mcu/u_aoss_wrap/u_pmu/pmu_ctrl_iso_en} \
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-isolation_sense {low} \
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-location {parent}
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map_isolation_cell PD_sys_clamp_low -domain PD_sys -lib_cells {PEH_ISOS1CL0_W_8}
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################################
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set_isolation PD_ae210_clamp_low -domain PD_ae210 \
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-isolation_power_net NET_VCC \
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-isolation_ground_net NET_VSS \
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-clamp_value 0 \
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-applies_to outputs \
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-elements { \
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ae210_chip/ae210_core/HADDRahb2cm0_async \
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ae210_chip/ae210_core/HTRANSahb2cm0_async \
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ae210_chip/ae210_core/HWRITEahb2cm0_async \
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ae210_chip/ae210_core/HSIZEahb2cm0_async \
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ae210_chip/ae210_core/HBURSTahb2cm0_async \
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ae210_chip/ae210_core/HMASTERahb2cm0_async \
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ae210_chip/ae210_core/HWDATAahb2cm0_async \
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ae210_chip/ae210_core/HRDATAahb2cm0_async \
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ae210_chip/ae210_core/HRESPahb2cm0_async \
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ae210_chip/ae210_core/HREADYOUTahb2cm0_async \
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ae210_chip/ae210_core/gpioa_padout \
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ae210_chip/ae210_core/gpioa_padoen \
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ae210_chip/ae210_core/gpioa_pull_en \
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ae210_chip/ae210_core/gpiob_padout \
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ae210_chip/ae210_core/gpiob_padoen \
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ae210_chip/ae210_core/gpiob_pull_en \
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ae210_chip/ae210_core/gpioc_padout \
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ae210_chip/ae210_core/gpioc_padoen \
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ae210_chip/ae210_core/gpioc_pull_en \
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ae210_chip/ae210_core/gpioc_padout \
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ae210_chip/ae210_core/gpiod_padoen \
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ae210_chip/ae210_core/gpiod_pull_en \
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ae210_chip/ae210_core/int_locsc0 \
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ae210_chip/ae210_core/int_timer7 \
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ae210_chip/ae210_core/int_timer6 \
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ae210_chip/ae210_core/int_timer5 \
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ae210_chip/ae210_core/int_timer4 \
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ae210_chip/ae210_core/int_pwm \
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ae210_chip/ae210_core/int_i2c1 \
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ae210_chip/ae210_core/int_spi1 \
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ae210_chip/ae210_core/int_uart2 \
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ae210_chip/ae210_core/int_gpio \
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ae210_chip/ae210_core/int_lcd \
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}
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#set_isolation PD_ae210_clamp_high -domain PD_ae210 \
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# -isolation_power_net NET_VCC \
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# -isolation_ground_net NET_VSS \
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# -clamp_value 1 \
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# -applies_to outputs
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# -element {}
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set_isolation_control PD_ae210_clamp_low -domain PD_ae210 \
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-isolation_signal {u_mcu/u_aoss_wrap/N10IsoEn} \
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-isolation_sense {low} \
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-location {parent}
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#set_isolation_control PD_ae210_clamp_high -domain PD_ae210 \
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# -isolation_signal {u_mcu/u_sys_top/SppIsoEn} \
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# -isolation_sense {low} \
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# -location {parent}
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map_isolation_cell PD_ae210_clamp_low -domain PD_ae210 -lib_cells {PEH_ISOS1CL0_W_8}
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#map_isolation_cell PD_ae210_clamp_high -domain PD_ae210 -lib_cells {PEH_ISOS0CL1_W_8}
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################################
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#set_design_attributes -attribute SNPS_reinit TRUE
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################################
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