132 lines
4.9 KiB
YAML
132 lines
4.9 KiB
YAML
stories:
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- intent: advice
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message: 关于波形显示的一些建议
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- intent: bug
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message: 采用iverilog生成的VCD貌似无法解析仿真数据
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- intent: bug
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message: 【v0.3.2】模块调用后netlist生成错误，且仿真报错
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- intent: advice
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message: 网表优化与插入文档
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- intent: bug
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message: 插件文档导出问题
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- intent: bug
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message: 【v0.3.2】testbench修改之后再次仿真会报错
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- intent: bug
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message: '[0.3.2] [问题] 含参数的 Verilog 模块自动例化，代码格式不正确'
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- intent: bug
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message: '【报错】RuntimeError: null function or function signature mismatch'
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- intent: bug
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message: 报错：verilog解析器无法解析以下代码
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- intent: bug
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message: 报错：verilog解析器的bug
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- intent: advice
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message: 功能建议-能增加点类似Verilog-Mode的功能么
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- intent: bug
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message: '报错：RuntimeError: null function or function signature mismatch、无法识别HDL文件'
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- intent: bug
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message: 例化模块自动生成tb文件报错Unknown module type
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- intent: bug
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message: 'Errors happen when parsing d:/danpj/fpga/modelsim/mod1/user/src/count4.v.
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Error: "RuntimeError: null function or function signature mismatch". Just propose
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a valuable issue in our github repo '
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- intent: bug
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message: 自动例化报错
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- intent: bug
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message: '【问题】【0.3.2】重复提示 Error: "RuntimeError: null function or function signature
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mismatch"'
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- intent: bug
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message: 【0.3.2】【问题】1无法解析localparam 2 带参数模块例化
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- intent: bug
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message: 基础教程太少
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- intent: bug
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message: .v源文件未被正确识别
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- intent: bug
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message: 重复仿真时报错
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- intent: bug
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message: 插件不能使用
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- intent: bug
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message: 关于netlist的生成错误
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- intent: bug
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message: '[0.3.2] 支持对verilator 的dpi-c机制的支持 '
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- intent: bug
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message: '[0.3.2] 离线支持+SV支持'
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- intent: bug
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message: Bad webstie connection on README
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- intent: bug
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message: 在声明数据位宽时使用宏定义会报错
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- intent: bug
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message: 0.3.2 无verilog语法检查，且提示RuntimeError
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- intent: bug
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message: '[0.3.2] 模块定义跳转偶尔会出现问题'
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- intent: bug
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message: '[0.3.2] 代码补全有多个内容完全相同的选项'
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- intent: bug
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message: '[0.3.2] 例化模块的类型，模块名称的代码高亮不变色'
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- intent: bug
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message: 文档中的params和ports数反了
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- intent: advice
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message: '[建议]：优化Formatter与文档生成'
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- intent: bug
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message: '[0.3.2] Linter(vivado) 启用无效 (还是说我用的vivado2023太新了?)'
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- intent: bug
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message: '[0.3.2]module的#后的parameter能悬停显示数值, 但内部parameter的不能'
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- intent: bug
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message: '[0.3.2]param语法错误会弹右下角报错弹窗, TreeView刷新按钮无效'
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- intent: bug
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message: 0.3.0版本后存在bug,构建项目后仿真无法运行
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- intent: advice
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message: 建议：模块例化可以基于文件夹来检索，当文件比较多时更整洁一点。
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- intent: bug
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message: Add Questa-Sim into the linter option
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- intent: bug
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message: 悬停提示对 /**/ 型的注释有误
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- intent: bug
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message: 仿真时因为文件夹名字存在空格产生错误
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- intent: bug
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message: filetype from json to jsonc (support comments)
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- intent: bug
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message: 语法识别错误
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- intent: bug
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message: code to doc
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- intent: bug
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message: WSL环境点击“显示当前文件的FSM图”时会发生扩展远程主机终止的错误
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- intent: bug
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message: 在架构里不能解析include后的模块
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- intent: bug
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message: treeview在文件移动时遇到问题
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- intent: bug
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message: treeview在文件变动时产生错误
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- intent: bug
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message: '[0.3.0 beta] iverilog指令错误'
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- intent: bug
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message: Will verilator be supported?
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- intent: bug
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message: '[0.3.0 beta] 高亮颜色错误'
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- intent: bug
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message: 状态机显示有问题
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- intent: bug
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message: xdc文件无法高亮显示
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- intent: bug
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message: Ubuntu环境下，digital ide对配置环境有问题。
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- intent: bug
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message: '[0.3.0 beta] "定义跳转"定义位置出错'
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- intent: bug
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message: '[0.3.0 beta] "library导入文件"模块解析报错'
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- intent: bug
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message: '[0.3.0 beta] "对当前文件进行仿真"功能报错'
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- intent: bug
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message: '[0.3.0 beta] 由于插件不能分析出使用了"include"语法, 从而导致Sim失败'
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- intent: bug
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message: '[0.3.0 beta] 文件跳转功能失效'
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- intent: bug
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message: '[0.3.0 beta] 例化中的[xx:xx]连线会导致后续颜色错误'
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- intent: bug
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message: '[0.3.0 beta]"显示当前文件的netlist"无法正确显示出网表'
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- intent: bug
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message: '[0.3.0 beta] Bitwidth of 1-bit signal is incorrectly recognized as "Unknown"
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in auto instantiation and auto document'
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- intent: bug
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message: '[0.3.3 beta] 含参数模型的例化存在问题以及拓展快捷键失效的问题'
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- intent: bug
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message: '[0.3.2]数值悬停提示不支持''_''语法'
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