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title: 关于
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## 开发人员

- 夜云(Nitcloud)：产品优化与需求工程
- 启示(Kylin)：HDL语法解析器与Wasm构建

- 锦恢(LSTM-Kirigaya)：Digital-IDE内核实现与UI设计

> 括号内为Github用户名


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## 鸣谢

* [VHDL](https://github.com/puorc/awesome-vhdl)
* [yosys](http://www.clifford.at/yosys)
* [TerosHDL](https://github.com/TerosTechnology/vscode-terosHDL)
* [TCL Language Support](https://github.com/go2sh/tcl-language-support)
* [Verilog HDL/SystemVerilog](https://github.com/mshr-h/vscode-verilog-hdl-support)
* [SystemVerilog - Language Support](https://github.com/eirikpre/VSCode-SystemVerilog)