---
home: true
heroImage: /icon.png
description: ASIC & FPGA Development Extension on Vscode
actionText: Quick Start 🐳
actionLink: /guide/introduction
features:
- title: ✨ HDL Language Support
  details: Support verilog, vhdl, systemverilog, tcl scripts etc.
- title: 🎯 Project Management
  details: View Structured HDL files in your project.
- title: 🛠️ Extra Tools
  details: FSM, Netlist, Fast Simulation, Code 2 Doc. Make you an amazing coding experience. 
---

::: slot footer
MIT Licensed | Copyright © 2018-present [Digital-EDA](https://github.com/Digital-EDA)
:::