From 4861410eab0dd7c24fa0d0b8a464be07b7cde811 Mon Sep 17 00:00:00 2001
From: LSTM-Kirigaya <1193466151@qq.com>
Date: Mon, 6 Jan 2025 22:37:27 +0800
Subject: [PATCH] update

---
 package.json                 | 20 --------------------
 src/function/index.ts        |  5 +++--
 src/function/sim/index.ts    |  4 ++--
 src/function/sim/simulate.ts | 34 +++++++++-------------------------
 4 files changed, 14 insertions(+), 49 deletions(-)

diff --git a/package.json b/package.json
index 36e3ad3..8381721 100644
--- a/package.json
+++ b/package.json
@@ -754,31 +754,11 @@
                 }
             ],
             "editor/context": [
-                {
-                    "when": "editorLangId == verilog || editorLangId == systemverilog || editorLangId == vhdl",
-                    "command": "digital-ide.pl.setSrcTop",
-                    "group": "navigation@1"
-                },
-                {
-                    "when": "editorLangId == verilog || editorLangId == systemverilog || editorLangId == vhdl",
-                    "command": "digital-ide.pl.setSimTop",
-                    "group": "navigation@2"
-                },
                 {
                     "when": "editorLangId == verilog || editorLangId == systemverilog || editorLangId == vhdl",
                     "command": "digital-ide.tool.instance",
                     "group": "navigation@3"
                 },
-                {
-                    "when": "editorLangId == verilog || editorLangId == systemverilog || editorLangId == vhdl",
-                    "command": "digital-ide.tool.icarus.simulateFile",
-                    "group": "navigation@5"
-                },
-                {
-                    "when": "resourceLangId == vcd || resourceLangId == vcd",
-                    "command": "digital-ide.waveviewer.show",
-                    "group": "navigation@7"
-                },
                 {
                     "when": "resourceLangId == vhdl",
                     "command": "digital-ide.vhdl2vlog",
diff --git a/src/function/index.ts b/src/function/index.ts
index 264d852..0ba61db 100644
--- a/src/function/index.ts
+++ b/src/function/index.ts
@@ -59,8 +59,9 @@ function registerDocumentation(context: vscode.ExtensionContext) {
 function registerSimulation(context: vscode.ExtensionContext) {
     vscode.commands.registerCommand('digital-ide.tool.instance', sim.instantiation);
     vscode.commands.registerCommand('digital-ide.tool.testbench', sim.testbench);
-    vscode.commands.registerCommand('digital-ide.tool.icarus.simulateFile', (view: ModuleDataItem) => {        
-        sim.Icarus.simulateFile(view);
+    vscode.commands.registerCommand('digital-ide.tool.icarus.simulateFile', (view: ModuleDataItem) => {
+        const icarus = new sim.IcarusSimulate(context);
+        icarus.simulateFile(view);
     });
 }
 
diff --git a/src/function/sim/index.ts b/src/function/sim/index.ts
index 6fba570..5b0031d 100644
--- a/src/function/sim/index.ts
+++ b/src/function/sim/index.ts
@@ -1,9 +1,9 @@
 import { instantiation } from './instance';
 import { testbench } from './testbench';
-import { Icarus } from './simulate';
+import { IcarusSimulate } from './simulate';
 
 export {
     instantiation,
     testbench,
-    Icarus
+    IcarusSimulate
 };
\ No newline at end of file
diff --git a/src/function/sim/simulate.ts b/src/function/sim/simulate.ts
index 049b4eb..42e8ce7 100644
--- a/src/function/sim/simulate.ts
+++ b/src/function/sim/simulate.ts
@@ -12,6 +12,7 @@ import { HdlFile, HdlModule } from '../../hdlParser/core';
 import { ModuleDataItem } from '../treeView/tree';
 import { defaultMacro, doFastApi } from '../../hdlParser/util';
 import { t } from '../../i18n';
+import { openWaveViewer } from '../dide-viewer';
 
 type Path = string;
 
@@ -161,16 +162,17 @@ class Simulate {
  * @description icarus 仿真类
  * 
  */
-class IcarusSimulate extends Simulate {
+export class IcarusSimulate extends Simulate {
     os: string;
     prjPath: AbsPath;
     toolChain: ToolChainType;
-
+    context: vscode.ExtensionContext;
     simConfig: SimulateConfig | undefined;
 
-    constructor() {
+    constructor(context: vscode.ExtensionContext) {
         super();
         this.os = opeParam.os;
+        this.context = context;
         this.prjPath = opeParam.prjInfo.arch.prjPath;
         this.toolChain = opeParam.prjInfo.toolChain;
     }
@@ -428,6 +430,9 @@ class IcarusSimulate extends Simulate {
                     const vcdPath = match[1];
                     const absVcdPath = hdlPath.resolve(cwd, vcdPath);
                     MainOutput.report(t('info.simulate.vvp.vcd-generate', absVcdPath), { level: ReportType.Finish });
+                    if (fs.existsSync(absVcdPath)) {
+                        openWaveViewer(this.context, vscode.Uri.file(absVcdPath));
+                    }
                 } else {
                     MainOutput.report(line.slice(9).trim());
                 }
@@ -506,11 +511,6 @@ class IcarusSimulate extends Simulate {
             return;
         }
     }
-    
-
-    public async simulateModule(hdlModule: HdlModule) {
-        this.simulateByHdlModule(hdlModule);
-    }
 
     public async tryGetModuleFromView(view: ModuleDataItem): Promise<HdlModule | undefined> {         
         if (view.path) {
@@ -570,20 +570,4 @@ class IcarusSimulate extends Simulate {
             return;
         }
     }
-}
-
-const icarus = new IcarusSimulate();
-
-namespace Icarus {
-    export async function simulateModule(hdlModule: HdlModule) {
-        await icarus.simulateModule(hdlModule);
-    }
-    
-    export async function simulateFile(view: ModuleDataItem) {
-        await icarus.simulateFile(view);
-    }
-};
-
-export {
-    Icarus
-};
\ No newline at end of file
+}
\ No newline at end of file