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VHDL 自动例化

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锦恢 2024-11-18 00:10:02 +08:00
parent 7032afcaeb
commit 577fd02b31
9 changed files with 171 additions and 157 deletions
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69
l10n/bundle.l10n.de.json
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@ -25,38 +25,39 @@
"error.vcd-viewer.unexist-direct-vcd-file": "Die von der Ansichtsdatei referenzierte vcd-Datei existiert nicht", "error.vcd-viewer.unexist-direct-vcd-file": "Die von der Ansichtsdatei referenzierte vcd-Datei existiert nicht",
"info.welcome.join-qq-group": "Klicken Sie auf den Link, um der QQ-Gruppe beizutreten", "info.welcome.join-qq-group": "Klicken Sie auf den Link, um der QQ-Gruppe beizutreten",
"info.level.test": "Dies ist ein einfaches Beispiel", "info.level.test": "Dies ist ein einfaches Beispiel",
"info.progress.build-ip-module-tree": "构建 IP 模块树", "info.progress.build-ip-module-tree": "IP-Modulbaum erstellen",
"info.treeview.ip-no-active.message": "当前 IP 还未激活，请通过 Xilinx 工具链将 XCI 文件生成完整的 IP 核", "info.treeview.ip-no-active.message": "Das aktuelle IP ist noch nicht aktiviert. Bitte generieren Sie den vollständigen IP-Kern mit dem Xilinx-Toolchain aus der XCI-Datei.",
"info.progress.initialize-configure": "初始化项目配置", "info.progress.initialize-configure": "Projektkonfiguration initialisieren",
"info.pl.xilinx.launch.pick-project-placeholder": "Which project you want to open ?", "info.pl.xilinx.launch.pick-project-placeholder": "Bitte wählen Sie das zu öffnende Projekt aus",
"error.common.not-valid-hdl-file": "is not a valid hdl file in our parse list, check your property.json to see if arch.hardware.src is set correctly! current parse list: ", "error.common.not-valid-hdl-file": "Nicht in der System-Parseliste, bitte überprüfen Sie, ob arch.hardware.src in Ihrer property.json-Konfigurationsdatei korrekt eingestellt ist. Der aktuelle Parsing-Pfad ist:",
"info.pl.gui.open-successfully": "GUI open successfully", "info.pl.gui.open-successfully": "GUI erfolgreich gestartet",
"info.pl.gui.report-title": "启动 GUI ...", "info.pl.gui.report-title": "GUI starten ...",
"info.pl.exit.title": "正在退出 ...", "info.pl.exit.title": "Beenden ...",
"info.pl.add-files.title": "添加如下文件到工程", "info.pl.add-files.title": "Folgende Dateien zum Projekt hinzufügen",
"info.pl.del-files.title": "从项目中删除如下文件", "info.pl.del-files.title": "Folgende Dateien aus dem Projekt löschen",
"info.pl.launch.launch-info": "成功启动 Vivado TCL 脚本解释器", "info.pl.launch.launch-info": "Vivado TCL-Skriptinterpreter erfolgreich gestartet",
"info.pl.launch.progress.launch-tcl.title": "正在启动 Vivado TCL 脚本解释器", "info.pl.launch.progress.launch-tcl.title": "Vivado TCL-Skriptinterpreter starten",
"warn.command.transform-old-ppy.unknown-hardwarelib-state": "无法转换 HardwareLIB.state ，原因：未知的 state 枚举：", "warn.command.transform-old-ppy.unknown-hardwarelib-state": "HardwareLIB.state kann nicht konvertiert werden, Grund: Unbekannter Zustand:",
"info.hdl-doc.markdown.basic-info": "基础信息", "info.hdl-doc.markdown.basic-info": "Grundlegende Informationen",
"info.dide-doc.dependency": "依赖性", "info.dide-doc.dependency": "Abhängigkeit",
"info.dide-doc.ports": "接口", "info.dide-doc.ports": "Ports",
"info.dide-doc.parameters": "参数", "info.dide-doc.parameters": "Parameter",
"info.dide-doc.source": "源", "info.dide-doc.source": "Quelladresse",
"info.dide-doc.basic-info.parameter": "parameter", "info.dide-doc.basic-info.parameter": "Parameter",
"info.dide-doc.basic-info.port": "port", "info.dide-doc.basic-info.port": "Port",
"info.dide-doc.basic-info.top-module": "顶层模块", "info.dide-doc.basic-info.top-module": "Top-Modul",
"info.dide-doc.entity": "实体", "info.dide-doc.entity": "Entität",
"info.dide-doc.module": "模块", "info.dide-doc.module": "Modul",
"info.dide-doc.port-name": "名称", "info.dide-doc.port-name": "Name",
"info.dide-doc.direction": "方向", "info.dide-doc.direction": "Richtung",
"info.dide-doc.range": "位宽", "info.dide-doc.range": "Bitbreite",
"info.dide-doc.description": "描述", "info.dide-doc.description": "Beschreibung",
"info.dide-doc.param-name": "名称", "info.dide-doc.param-name": "Name",
"info.dide-doc.parameter-init": "初始值", "info.dide-doc.parameter-init": "Standardwert",
"info.dide-doc.module-name": "名称", "info.dide-doc.module-name": "Name",
"info.dide-doc.no-parameter-info": "没有参数信息", "info.dide-doc.no-parameter-info": "Keine Parameterinformationen",
"info.dide-doc.no-port-info": "没有端口信息", "info.dide-doc.no-port-info": "Keine Portinformationen",
"info.dide-doc.no-dep-info": "没有依赖信息", "info.dide-doc.no-dep-info": "Keine Abhängigkeitsinformationen",
"info.dide-doc.source.cannot-find": "无法找到" "info.dide-doc.source.cannot-find": "Nicht gefunden",
"info.command.instantiation.pick-title": "Select a Module"
} }

69
l10n/bundle.l10n.en.json
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@ -25,38 +25,39 @@
"error.vcd-viewer.unexist-direct-vcd-file": "The vcd file pointed to by the view file does not exist", "error.vcd-viewer.unexist-direct-vcd-file": "The vcd file pointed to by the view file does not exist",
"info.welcome.join-qq-group": "Click the link to join the QQ group", "info.welcome.join-qq-group": "Click the link to join the QQ group",
"info.level.test": "This is a simple example", "info.level.test": "This is a simple example",
"info.progress.build-ip-module-tree": "构建 IP 模块树", "info.progress.build-ip-module-tree": "Build IP Module Tree",
"info.treeview.ip-no-active.message": "当前 IP 还未激活，请通过 Xilinx 工具链将 XCI 文件生成完整的 IP 核", "info.treeview.ip-no-active.message": "The current IP is not activated, please generate the complete IP core using the Xilinx toolchain from the XCI file",
"info.progress.initialize-configure": "初始化项目配置", "info.progress.initialize-configure": "Initialize Project Configuration",
"info.pl.xilinx.launch.pick-project-placeholder": "Which project you want to open ?", "info.pl.xilinx.launch.pick-project-placeholder": "Please select the project to open",
"error.common.not-valid-hdl-file": "is not a valid hdl file in our parse list, check your property.json to see if arch.hardware.src is set correctly!ncurrent parse list: ", "error.common.not-valid-hdl-file": "Not in the system's parsing list, please check if arch.hardware.src in your property.json configuration file is set correctly. The current parsing path is:",
"info.pl.gui.open-successfully": "GUI open successfully", "info.pl.gui.open-successfully": "GUI started successfully",
"info.pl.gui.report-title": "启动 GUI ...", "info.pl.gui.report-title": "Starting GUI ...",
"info.pl.exit.title": "正在退出 ...", "info.pl.exit.title": "Exiting ...",
"info.pl.add-files.title": "添加如下文件到工程", "info.pl.add-files.title": "Adding the following files to the project",
"info.pl.del-files.title": "从项目中删除如下文件", "info.pl.del-files.title": "Deleting the following files from the project",
"info.pl.launch.launch-info": "成功启动 Vivado TCL 脚本解释器", "info.pl.launch.launch-info": "Successfully launched Vivado TCL script interpreter",
"info.pl.launch.progress.launch-tcl.title": "正在启动 Vivado TCL 脚本解释器", "info.pl.launch.progress.launch-tcl.title": "Starting Vivado TCL script interpreter",
"warn.command.transform-old-ppy.unknown-hardwarelib-state": "无法转换 HardwareLIB.state ，原因：未知的 state 枚举：", "warn.command.transform-old-ppy.unknown-hardwarelib-state": "Unable to convert HardwareLIB.state, reason: unknown state enumeration:",
"info.hdl-doc.markdown.basic-info": "基础信息", "info.hdl-doc.markdown.basic-info": "Basic Information",
"info.dide-doc.dependency": "依赖性", "info.dide-doc.dependency": "Dependency",
"info.dide-doc.ports": "接口", "info.dide-doc.ports": "Ports",
"info.dide-doc.parameters": "参数", "info.dide-doc.parameters": "Parameters",
"info.dide-doc.source": "源", "info.dide-doc.source": "Source Address",
"info.dide-doc.basic-info.parameter": "parameter", "info.dide-doc.basic-info.parameter": "Parameter",
"info.dide-doc.basic-info.port": "port", "info.dide-doc.basic-info.port": "Port",
"info.dide-doc.basic-info.top-module": "顶层模块", "info.dide-doc.basic-info.top-module": "Top Module",
"info.dide-doc.entity": "实体", "info.dide-doc.entity": "Entity",
"info.dide-doc.module": "模块", "info.dide-doc.module": "Module",
"info.dide-doc.port-name": "名称", "info.dide-doc.port-name": "Name",
"info.dide-doc.direction": "方向", "info.dide-doc.direction": "Direction",
"info.dide-doc.range": "位宽", "info.dide-doc.range": "Bit Width",
"info.dide-doc.description": "描述", "info.dide-doc.description": "Description",
"info.dide-doc.param-name": "名称", "info.dide-doc.param-name": "Name",
"info.dide-doc.parameter-init": "初始值", "info.dide-doc.parameter-init": "Default Value",
"info.dide-doc.module-name": "名称", "info.dide-doc.module-name": "Name",
"info.dide-doc.no-parameter-info": "没有参数信息", "info.dide-doc.no-parameter-info": "No parameter information",
"info.dide-doc.no-port-info": "没有端口信息", "info.dide-doc.no-port-info": "No port information",
"info.dide-doc.no-dep-info": "没有依赖信息", "info.dide-doc.no-dep-info": "No dependency information",
"info.dide-doc.source.cannot-find": "无法找到" "info.dide-doc.source.cannot-find": "Cannot find",
"info.command.instantiation.pick-title": "Select a Module"
} }

67
l10n/bundle.l10n.ja.json
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@ -25,38 +25,39 @@
"error.vcd-viewer.unexist-direct-vcd-file": "ビューファイルが指す vcd ファイルは存在しません", "error.vcd-viewer.unexist-direct-vcd-file": "ビューファイルが指す vcd ファイルは存在しません",
"info.welcome.join-qq-group": "リンクをクリックして QQ グループに参加", "info.welcome.join-qq-group": "リンクをクリックして QQ グループに参加",
"info.level.test": "これは簡単な例です", "info.level.test": "これは簡単な例です",
"info.progress.build-ip-module-tree": "构建 IP 模块树", "info.progress.build-ip-module-tree": "IPモジュールツリーを構築",
"info.treeview.ip-no-active.message": "当前 IP 还未激活，请通过 Xilinx 工具链将 XCI 文件生成完整的 IP 核", "info.treeview.ip-no-active.message": "現在のIPはまだアクティブ化されていません。Xilinxツールチェーンを使用してXCIファイルから完全なIPコアを生成してください。",
"info.progress.initialize-configure": "初始化项目配置", "info.progress.initialize-configure": "プロジェクト設定を初期化",
"info.pl.xilinx.launch.pick-project-placeholder": "Which project you want to open ?", "info.pl.xilinx.launch.pick-project-placeholder": "開くプロジェクトを選択してください",
"error.common.not-valid-hdl-file": "is not a valid hdl file in our parse list, check your property.json to see if arch.hardware.src is set correctly!ncurrent parse list:", "error.common.not-valid-hdl-file": "システムの解析リストに含まれていません。property.json設定ファイルのarch.hardware.srcが正しく設定されているか確認してください。現在の解析パスは：",
"info.pl.gui.open-successfully": "GUI open successfully", "info.pl.gui.open-successfully": "GUIが正常に起動しました",
"info.pl.gui.report-title": "启动 GUI ...", "info.pl.gui.report-title": "GUIを起動中...",
"info.pl.exit.title": "正在退出 ...", "info.pl.exit.title": "終了中...",
"info.pl.add-files.title": "添加如下文件到工程", "info.pl.add-files.title": "以下のファイルをプロジェクトに追加",
"info.pl.del-files.title": "从项目中删除如下文件", "info.pl.del-files.title": "以下のファイルをプロジェクトから削除",
"info.pl.launch.launch-info": "成功启动 Vivado TCL 脚本解释器", "info.pl.launch.launch-info": "Vivado TCLスクリプトインタプリタが正常に起動しました",
"info.pl.launch.progress.launch-tcl.title": "正在启动 Vivado TCL 脚本解释器", "info.pl.launch.progress.launch-tcl.title": "Vivado TCLスクリプトインタプリタを起動中",
"warn.command.transform-old-ppy.unknown-hardwarelib-state": "无法转换 HardwareLIB.state ，原因：未知的 state 枚举：", "warn.command.transform-old-ppy.unknown-hardwarelib-state": "HardwareLIB.stateを変換できません。理由：不明なstate列挙：",
"info.hdl-doc.markdown.basic-info": "基础信息", "info.hdl-doc.markdown.basic-info": "基本情報",
"info.dide-doc.dependency": "依赖性", "info.dide-doc.dependency": "依存性",
"info.dide-doc.ports": "接口", "info.dide-doc.ports": "ポート",
"info.dide-doc.parameters": "参数", "info.dide-doc.parameters": "パラメータ",
"info.dide-doc.source": "源", "info.dide-doc.source": "ソースアドレス",
"info.dide-doc.basic-info.parameter": "parameter", "info.dide-doc.basic-info.parameter": "パラメータ",
"info.dide-doc.basic-info.port": "port", "info.dide-doc.basic-info.port": "ポート",
"info.dide-doc.basic-info.top-module": "顶层模块", "info.dide-doc.basic-info.top-module": "トップモジュール",
"info.dide-doc.entity": "实体", "info.dide-doc.entity": "エンティティ",
"info.dide-doc.module": "模块", "info.dide-doc.module": "モジュール",
"info.dide-doc.port-name": "名称", "info.dide-doc.port-name": "名前",
"info.dide-doc.direction": "方向", "info.dide-doc.direction": "方向",
"info.dide-doc.range": "位宽", "info.dide-doc.range": "ビット幅",
"info.dide-doc.description": "描述", "info.dide-doc.description": "説明",
"info.dide-doc.param-name": "名称", "info.dide-doc.param-name": "名前",
"info.dide-doc.parameter-init": "初始值", "info.dide-doc.parameter-init": "デフォルト値",
"info.dide-doc.module-name": "名称", "info.dide-doc.module-name": "名前",
"info.dide-doc.no-parameter-info": "没有参数信息", "info.dide-doc.no-parameter-info": "パラメータ情報がありません",
"info.dide-doc.no-port-info": "没有端口信息", "info.dide-doc.no-port-info": "ポート情報がありません",
"info.dide-doc.no-dep-info": "没有依赖信息", "info.dide-doc.no-dep-info": "依存情報がありません",
"info.dide-doc.source.cannot-find": "无法找到" "info.dide-doc.source.cannot-find": "見つかりません",
"info.command.instantiation.pick-title": "Select a Module"
} }

5
l10n/bundle.l10n.zh-cn.json
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@ -42,7 +42,7 @@
"info.dide-doc.dependency": "依赖性", "info.dide-doc.dependency": "依赖性",
"info.dide-doc.ports": "端口", "info.dide-doc.ports": "端口",
"info.dide-doc.parameters": "参数", "info.dide-doc.parameters": "参数",
"info.dide-doc.source": "源", "info.dide-doc.source": "源地址",
"info.dide-doc.basic-info.parameter": "parameter", "info.dide-doc.basic-info.parameter": "parameter",
"info.dide-doc.basic-info.port": "port", "info.dide-doc.basic-info.port": "port",
"info.dide-doc.basic-info.top-module": "顶层模块", "info.dide-doc.basic-info.top-module": "顶层模块",
@ -58,5 +58,6 @@
"info.dide-doc.no-parameter-info": "没有参数信息", "info.dide-doc.no-parameter-info": "没有参数信息",
"info.dide-doc.no-port-info": "没有端口信息", "info.dide-doc.no-port-info": "没有端口信息",
"info.dide-doc.no-dep-info": "没有依赖信息", "info.dide-doc.no-dep-info": "没有依赖信息",
"info.dide-doc.source.cannot-find": "无法找到" "info.dide-doc.source.cannot-find": "无法找到",
"info.command.instantiation.pick-title": "选择一个模块"
} }

61
l10n/bundle.l10n.zh-tw.json
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@ -25,38 +25,39 @@
"error.vcd-viewer.unexist-direct-vcd-file": "視圖文件指向的 vcd 文件不存在", "error.vcd-viewer.unexist-direct-vcd-file": "視圖文件指向的 vcd 文件不存在",
"info.welcome.join-qq-group": "點擊鏈接加入 QQ 群", "info.welcome.join-qq-group": "點擊鏈接加入 QQ 群",
"info.level.test": "這是一個簡單的樣例", "info.level.test": "這是一個簡單的樣例",
"info.progress.build-ip-module-tree": "构建 IP 模块树", "info.progress.build-ip-module-tree": "構建 IP 模塊樹",
"info.treeview.ip-no-active.message": "当前 IP 还未激活，请通过 Xilinx 工具链将 XCI 文件生成完整的 IP 核", "info.treeview.ip-no-active.message": "當前 IP 還未激活，請通過 Xilinx 工具鏈將 XCI 文件生成完整的 IP 核",
"info.progress.initialize-configure": "初始化项目配置", "info.progress.initialize-configure": "初始化項目配置",
"info.pl.xilinx.launch.pick-project-placeholder": "Which project you want to open ?", "info.pl.xilinx.launch.pick-project-placeholder": "請選擇需要打開的工程",
"error.common.not-valid-hdl-file": "is not a valid hdl file in our parse list, check your property.json to see if arch.hardware.src is set correctly! current parse list:", "error.common.not-valid-hdl-file": "並不在系統的解析列表中，請檢查你的 property.json 配置文件中的 arch.hardware.src 是否被正確設置。當前的解析路徑為：",
"info.pl.gui.open-successfully": "GUI open successfully", "info.pl.gui.open-successfully": "GUI 啟動成功",
"info.pl.gui.report-title": "启动 GUI ...", "info.pl.gui.report-title": "啟動 GUI ...",
"info.pl.exit.title": "正在退出 ...", "info.pl.exit.title": "正在退出 ...",
"info.pl.add-files.title": "添加如下文件到工程", "info.pl.add-files.title": "添加如下文件到工程",
"info.pl.del-files.title": "从项目中删除如下文件", "info.pl.del-files.title": "從項目中刪除如下文件",
"info.pl.launch.launch-info": "成功启动 Vivado TCL 脚本解释器", "info.pl.launch.launch-info": "成功啟動 Vivado TCL 腳本解釋器",
"info.pl.launch.progress.launch-tcl.title": "正在启动 Vivado TCL 脚本解释器", "info.pl.launch.progress.launch-tcl.title": "正在啟動 Vivado TCL 腳本解釋器",
"warn.command.transform-old-ppy.unknown-hardwarelib-state": "无法转换 HardwareLIB.state ，原因：未知的 state 枚举：", "warn.command.transform-old-ppy.unknown-hardwarelib-state": "無法轉換 HardwareLIB.state ，原因：未知的 state 枚舉：",
"info.hdl-doc.markdown.basic-info": "基础信息", "info.hdl-doc.markdown.basic-info": "基礎信息",
"info.dide-doc.dependency": "依赖性", "info.dide-doc.dependency": "依賴性",
"info.dide-doc.ports": "接口", "info.dide-doc.ports": "端口",
"info.dide-doc.parameters": "参数", "info.dide-doc.parameters": "參數",
"info.dide-doc.source": "源", "info.dide-doc.source": "源地址",
"info.dide-doc.basic-info.parameter": "parameter", "info.dide-doc.basic-info.parameter": "參數",
"info.dide-doc.basic-info.port": "port", "info.dide-doc.basic-info.port": "端口",
"info.dide-doc.basic-info.top-module": "顶层模块", "info.dide-doc.basic-info.top-module": "頂層模塊",
"info.dide-doc.entity": "实体", "info.dide-doc.entity": "實體",
"info.dide-doc.module": "模块", "info.dide-doc.module": "模塊",
"info.dide-doc.port-name": "名称", "info.dide-doc.port-name": "名稱",
"info.dide-doc.direction": "方向", "info.dide-doc.direction": "方向",
"info.dide-doc.range": "位宽", "info.dide-doc.range": "位寬",
"info.dide-doc.description": "描述", "info.dide-doc.description": "描述",
"info.dide-doc.param-name": "名称", "info.dide-doc.param-name": "名稱",
"info.dide-doc.parameter-init": "初始值", "info.dide-doc.parameter-init": "默認值",
"info.dide-doc.module-name": "名称", "info.dide-doc.module-name": "名稱",
"info.dide-doc.no-parameter-info": "没有参数信息", "info.dide-doc.no-parameter-info": "沒有參數信息",
"info.dide-doc.no-port-info": "没有端口信息", "info.dide-doc.no-port-info": "沒有端口信息",
"info.dide-doc.no-dep-info": "没有依赖信息", "info.dide-doc.no-dep-info": "沒有依賴信息",
"info.dide-doc.source.cannot-find": "无法找到" "info.dide-doc.source.cannot-find": "無法找到",
"info.command.instantiation.pick-title": "Select a Module"
} }

7
package.json
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@ -1066,6 +1066,13 @@
"fontCharacter": "\\e7a8" "fontCharacter": "\\e7a8"
} }
}, },
"instance-systemverilog":{
"description": "icon of system-verilog in TOOL.instance",
"default": {
"fontPath": "./images/icons/iconfont.woff2",
"fontCharacter": "\\e7a8"
}
},
"instance-vhdl": { "instance-vhdl": {
"description": "icon of verilog in TOOL.instance", "description": "icon of verilog in TOOL.instance",
"default": { "default": {

11
src/function/lsp/util/feature.ts
View File

@ -393,16 +393,7 @@ async function getSymbolComments(path: string, ranges: Range[]): Promise<string[
const commentPromises = []; const commentPromises = [];
const comments = []; const comments = [];
for (const range of ranges) { for (const range of ranges) {
// TODO: 后端修改后移除这里 const commentP = getFullSymbolInfo(document, range, nonblank, l_comment_symbol, l_comment_regExp);
const adjustRange: Range = {
start: {
line: range.start.line - 1,
character: range.start.character
},
end: range.end
};
const commentP = getFullSymbolInfo(document, adjustRange, nonblank, l_comment_symbol, l_comment_regExp);
commentPromises.push(commentP); commentPromises.push(commentP);
} }

21
src/function/sim/instance.ts
View File

@ -3,6 +3,7 @@ import { HdlLangID } from '../../global/enum';
import { hdlParam } from '../../hdlParser'; import { hdlParam } from '../../hdlParser';
import { HdlModulePort, HdlModuleParam, HdlModulePortType } from '../../hdlParser/common'; import { HdlModulePort, HdlModuleParam, HdlModulePortType } from '../../hdlParser/common';
import { HdlModule } from '../../hdlParser/core'; import { HdlModule } from '../../hdlParser/core';
import { hdlFile, hdlPath } from '../../hdlFs';
class ModuleInfoItem { class ModuleInfoItem {
label: string; label: string;
@ -64,8 +65,8 @@ function instanceVlogCode(module: HdlModule, prefix: string = '', returnSnippetS
*/ */
function instanceVhdlCode(module: HdlModule) { function instanceVhdlCode(module: HdlModule) {
// module 2001 style // module 2001 style
let port = vhdlPort(module.ports);
let param = vhdlParam(module.params); let param = vhdlParam(module.params);
let port = vhdlPort(module.ports);
let instContent = `u_${module.name} : ${module.name}\n`; let instContent = `u_${module.name} : ${module.name}\n`;
@ -180,7 +181,7 @@ function vhdlPort(ports: HdlModulePort[]): string {
let nmax = getlmax(ports, 'name'); let nmax = getlmax(ports, 'name');
// NAME => NAME, // NAME => NAME,
let portStr = `\n\t-- ports\n`; let portStr = `\t-- ports\n`;
for (let i = 0; i < ports.length; i++) { for (let i = 0; i < ports.length; i++) {
let name = ports[i].name; let name = ports[i].name;
let padding = nmax - name.length + 1; let padding = nmax - name.length + 1;
@ -274,8 +275,9 @@ function getSelectItem(modules: HdlModule[]) {
* @description 调用vscode的窗体，让用户从所有的Module中选择模块（为后续的例化准备） * @description 调用vscode的窗体，让用户从所有的Module中选择模块（为后续的例化准备）
*/ */
async function selectModuleFromAll() { async function selectModuleFromAll() {
const { t } = vscode.l10n;
const option = { const option = {
placeHolder: 'Select a Module' placeHolder: t('info.command.instantiation.pick-title')
}; };
const selectModuleInfo = await vscode.window.showQuickPick( const selectModuleInfo = await vscode.window.showQuickPick(
@ -289,8 +291,8 @@ async function selectModuleFromAll() {
} }
} }
function instanceByLangID(module: HdlModule): string { function instanceByLangID(langID: HdlLangID, module: HdlModule): string {
switch (module.languageId) { switch (langID) {
case HdlLangID.Verilog: return instanceVlogCode(module); case HdlLangID.Verilog: return instanceVlogCode(module);
case HdlLangID.Vhdl: return instanceVhdlCode(module); case HdlLangID.Vhdl: return instanceVhdlCode(module);
// TODO : add support for svlog // TODO : add support for svlog
@ -300,9 +302,16 @@ function instanceByLangID(module: HdlModule): string {
} }
async function instantiation() { async function instantiation() {
const editor = vscode.window.activeTextEditor;
if (editor === undefined) {
return;
}
const file = hdlPath.toSlash(editor.document.fileName);
const langID = hdlFile.getLanguageId(file);
const module = await selectModuleFromAll(); const module = await selectModuleFromAll();
if (module) { if (module) {
const code = instanceByLangID(module); const code = instanceByLangID(langID, module);
const editor = vscode.window.activeTextEditor; const editor = vscode.window.activeTextEditor;
if (editor) { if (editor) {
selectInsert(code, editor); selectInsert(code, editor);

8
src/function/sim/testbench.ts
View File

@ -4,6 +4,7 @@ import { MainOutput, opeParam } from '../../global';
import { hdlPath, hdlFile} from '../../hdlFs'; import { hdlPath, hdlFile} from '../../hdlFs';
import { HdlModule, hdlParam } from '../../hdlParser/core'; import { HdlModule, hdlParam } from '../../hdlParser/core';
import { instanceByLangID, getSelectItem } from './instance'; import { instanceByLangID, getSelectItem } from './instance';
import { HdlLangID } from '../../global/enum';
function overwrite() { function overwrite() {
const options = { const options = {
@ -15,7 +16,7 @@ function overwrite() {
vscode.window.showTextDocument(uri, options); vscode.window.showTextDocument(uri, options);
} }
function generateTestbenchFile(module: HdlModule) { function generateTestbenchFile(langID: HdlLangID, module: HdlModule) {
const tbSrcPath = hdlPath.join(opeParam.extensionPath, 'lib', 'testbench.v'); const tbSrcPath = hdlPath.join(opeParam.extensionPath, 'lib', 'testbench.v');
const tbDisPath = hdlPath.join(opeParam.prjInfo.arch.hardware.sim, 'testbench.v'); const tbDisPath = hdlPath.join(opeParam.prjInfo.arch.hardware.sim, 'testbench.v');
@ -36,7 +37,7 @@ function generateTestbenchFile(module: HdlModule) {
const line = lines[index]; const line = lines[index];
content += line + '\n'; content += line + '\n';
if (line.indexOf("//Instance ") !== -1) { if (line.indexOf("//Instance ") !== -1) {
content += instanceByLangID(module) + '\n'; content += instanceByLangID(langID, module) + '\n';
} }
} }
try { try {
@ -58,6 +59,7 @@ async function testbench() {
placeHolder: 'Select a Module to generate testbench' placeHolder: 'Select a Module to generate testbench'
}; };
const path = hdlPath.toSlash(uri.fsPath); const path = hdlPath.toSlash(uri.fsPath);
const langID = hdlFile.getLanguageId(path);
if (!hdlFile.isHDLFile(path)) { if (!hdlFile.isHDLFile(path)) {
return; return;
@ -75,7 +77,7 @@ async function testbench() {
const items = getSelectItem(currentHdlModules); const items = getSelectItem(currentHdlModules);
const select = await vscode.window.showQuickPick(items, option); const select = await vscode.window.showQuickPick(items, option);
if (select) { if (select) {
generateTestbenchFile(items[0].module); generateTestbenchFile(langID, items[0].module);
} }
} }