修复 vhdl 文档化渲染异常

This commit is contained in:
锦恢 2024-12-23 19:00:25 +08:00
parent 2101054860
commit c26bd9316e
6 changed files with 30 additions and 23 deletions

View File

@ -42,6 +42,12 @@ function getArrowSvgString(name: 'left' | 'right' | 'left-right' | 'left-dot' |
return svgString;
}
/**
* @description module diagram
* @param params
* @param ports
* @returns
*/
function makeDiagram(params: HdlModuleParam[], ports: HdlModulePort[]): string {
// make params block
const diagramParamWrapper = makeDiagramParamWrapper(params);
@ -77,8 +83,15 @@ function makeDiagramPortWrapper(ports: HdlModulePort[]): string {
return '';
}
const leftPorts = ports.filter(port => port.type === HdlModulePortType.Input || port.type === HdlModulePortType.Inout);
const rightPorts = ports.filter(port => port.type === HdlModulePortType.Output);
const leftPorts = ports.filter(port =>
port.type === HdlModulePortType.Input ||
port.type === HdlModulePortType.Inout ||
port.type === HdlModulePortType.VhdlInput
);
const rightPorts = ports.filter(port =>
port.type === HdlModulePortType.Output ||
port.type === HdlModulePortType.VhdlOutput
);
const leftDirection = makeLeftDirection(leftPorts);
const diagramPorts = makeDiagramPorts(leftPorts, rightPorts);
@ -107,13 +120,13 @@ function makePortArrow(port: HdlModulePort, direction: 'left' | 'right'): string
return getArrowSvgString('left-right');
}
if (direction === 'left') {
if (port.type === HdlModulePortType.Input) {
if (port.type === HdlModulePortType.Input || port.type === HdlModulePortType.VhdlInput) {
if (isValidWidth(port.width)) {
return getArrowSvgString('right-dot');
} else {
return getArrowSvgString('right');
}
} else if (port.type === HdlModulePortType.Output) {
} else if (port.type === HdlModulePortType.Output || port.type === HdlModulePortType.VhdlOutput) {
if (isValidWidth(port.width)) {
return getArrowSvgString('left-dot');
} else {
@ -121,13 +134,13 @@ function makePortArrow(port: HdlModulePort, direction: 'left' | 'right'): string
}
}
} else if (direction === 'right') {
if (port.type === HdlModulePortType.Input) {
if (port.type === HdlModulePortType.Input || port.type === HdlModulePortType.VhdlInput) {
if (isValidWidth(port.width)) {
return getArrowSvgString('left-dot');
} else {
return getArrowSvgString('left');
}
} else if (port.type === HdlModulePortType.Output) {
} else if (port.type === HdlModulePortType.Output || port.type === HdlModulePortType.VhdlOutput) {
if (isValidWidth(port.width)) {
return getArrowSvgString('right-dot');
} else {
@ -151,9 +164,9 @@ function makeLeftDirection(leftPorts: HdlModulePort[]): string {
function makePortName(port: HdlModulePort): string {
let portClass = '';
if (port.type === HdlModulePortType.Input) {
if (port.type === HdlModulePortType.Input || port.type === HdlModulePortType.VhdlInput) {
portClass = 'i-port-name';
} else if (port.type === HdlModulePortType.Output) {
} else if (port.type === HdlModulePortType.Output || port.type === HdlModulePortType.VhdlOutput) {
portClass = 'o-port-name';
} else {
portClass = 'io-port-name';

View File

@ -254,6 +254,8 @@ async function getDocsFromModule(module: HdlModule): Promise<MarkdownString> {
));
} else {
// 对于多文件,找出所有依赖项
console.log(module);
insts = [...module.getAllDependenceInstance()];
}

View File

@ -120,10 +120,7 @@ export enum LinterMode {
Shutdown = 'shutdown'
}
export function getLinterMode(): LinterMode {
console.log(vscode.workspace.getConfiguration().get('digital-ide.function.lsp.linter.mode'));
console.log(vscode.workspace.getConfiguration().get('digital-ide.function.lsp.linter.linter-level'));
export function getLinterMode(): LinterMode {
return vscode.workspace.getConfiguration().get<LinterMode>('digital-ide.function.lsp.linter.mode') || LinterMode.Common;
}

View File

@ -319,8 +319,6 @@ export async function refreshWorkspaceDiagonastics(
const parallelChunk = Math.min(os.cpus().length, 32);
const linterMode = getLinterMode();
console.log('[refreshWorkspaceDiagonastics]', linterMode);
if (linterMode === LinterMode.Full) {
// full对工作区所有文件进行诊断
const consumer = async (path: string) => {

View File

@ -26,7 +26,9 @@ interface Range {
enum HdlModulePortType {
Inout = 'inout',
Output = 'output',
Input = 'input',
Input = 'input',
VhdlInput = 'in',
VhdlOutput = 'out',
Unknown = 'unknown'
};

View File

@ -471,7 +471,6 @@ class HdlParam {
public updateFast(path: string, fast: common.Fast) {
const moduleFile = this.getHdlFile(path);
if (moduleFile === undefined) {
return;
}
@ -867,8 +866,8 @@ class HdlModule {
// 获取自身的
for (const inst of this.nameToInstances.values()) {
instances.add(inst);
// 递归获取 inst 的
if (inst.module) {
// 递归获取 inst 的,防止无限递归
if (inst.module && inst.module !== this) {
for (const subInst of inst.module.getAllDependenceInstance()) {
instances.add(subInst);
}
@ -910,9 +909,6 @@ class HdlModule {
rawHdlInstance.range,
this);
if (hdlInstance.module === undefined) {
hdlInstance.module = this;
}
if (this.nameToInstances) {
const key = this.makeInstanceKey(rawHdlInstance.name, rawHdlInstance.type);
this.nameToInstances.set(key, hdlInstance);
@ -1152,8 +1148,7 @@ export class HdlFile {
// make nameToModule
this.nameToModule = new Map<string, HdlModule>();
for (const rawHdlModule of modules) {
for (const rawHdlModule of modules) {
this.createHdlModule(rawHdlModule);
}
}