#fix beta 0.3.0 Bitwidth of 1-bit signal is incorrectly recognized as Unknown in auto instantiation and auto document
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5136794741
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@ -31,15 +31,20 @@ function makeTableFromObjArray(md: MarkdownString, array: any[], name: string, f
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const rows = [];
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for (const obj of array) {
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const data = [];
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for (const name of fieldNames) {
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let value = obj[name];
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if (name === 'instModPath' && value) {
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for (const subName of fieldNames) {
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let value = obj[subName];
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if (subName === 'instModPath' && value) {
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value = value.replace(ws, '');
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}
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if (value && value.trim().length === 0) {
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value = ' ';
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}
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// TODO : 1 not known
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if (name === 'ports' && value === 'Unknown') {
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value = '1';
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}
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data.push(value);
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}
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rows.push(data);
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@ -86,6 +86,9 @@ function makeNetOutputDeclaration(ports: HdlModulePort[], prefix: string, needCo
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if (port.type === HdlModulePortType.Output) {
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haveOutput = true;
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let portWidth = port.width ? port.width : '';
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if (portWidth === 'Unknown') {
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portWidth = '';
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}
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portWidth += ' '.repeat(maxWidthLength - portWidth.length + 1);
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const netDeclaration = prefix + `wire ${portWidth}\t${port.name};\n`;
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netOutputDeclaration += netDeclaration;
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@ -11,6 +11,7 @@ output reg carry_out, borrow_out, parity_out;
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reg [9:0] cnt_up, cnt_dn;
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reg [8:0] count_nxt;
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always @(posedge clock)
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begin
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cnt_dn = count_out - 3'b 101;
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@ -2,7 +2,7 @@
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"compilerOptions": {
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"module": "commonjs",
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"target": "ES2020",
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"outDir": "out-js",
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"outDir": "out",
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"skipLibCheck": true,
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"lib": [
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"ES2020"
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