#fix sim

package.nls.json

@@ -7,9 +7,9 @@
     "digital-ide.tool.instance.title": "Generate instance template from selected module",
     "digital-ide.tool.testbench.title": "Generate testbench template from current file",
     "digital-ide.tool.icarus.simulateFile.title": "Do simulation for current file",
-    "digital-ide.treeView.arch.expand.title": "expand all the items in tree view",
-    "digital-ide.treeView.arch.collapse.title": "collapse all the items in tree view",
-    "digital-ide.treeView.arch.refresh.title": "refresh the tree view",
+    "digital-ide.treeView.arch.expand.title": "Expand all the items in tree view",
+    "digital-ide.treeView.arch.collapse.title": "Collapse all the items in tree view",
+    "digital-ide.treeView.arch.refresh.title": "Refresh the tree view",
     "digital-ide.treeView.arch.openFile.title": "Open the corresponding file in tree view",
     "digital-ide.tool.clean.title": "Clean the current project",
     "digital-ide.soft.launch.title": "Launch SDK development assist function",
@@ -27,18 +27,18 @@
     "digital-ide.hard.program.title": "Download the bit file into the device",
     "digital-ide.hard.gui.title": "Open the GUI",
     "digital-ide.hard.exit.title": "Exit the current project",
-    "digital-ide.pickLibrary.title": "select lib from custom & common",
-    "digital-ide.pl.setSrcTop.title": "set as top file of src",
-    "digital-ide.pl.setSimTop.title": "set as top file of sim",
-    "digital-ide.pl.addDevice.title": "add device",
-    "digital-ide.pl.delDevice.title": "del device",
-    "digital-ide.pl.addFile.title": "add file",
-    "digital-ide.pl.delFile.title": "del file",
-    "digital-ide.netlist.title": "netlist",
-    "digital-ide.fsm.title": "finite state machine",
-    "digital-ide.lsp.tool.insertTextToUri.title": "insert text to uri",
-    "digital-ide.lsp.tool.transformOldPropertyFile.title": "transform configure file from previous version to new version",
-    "digital-ide.vhdl2vlog.title": "translate vhdl code to verilog code",
-    "digital-ide.fsm.show.title": "show FSM graph of current file",
-    "digital-ide.netlist.show.title": "show netlist of current file"
+    "digital-ide.pickLibrary.title": "Select lib from custom & common",
+    "digital-ide.pl.setSrcTop.title": "Set as top file of src",
+    "digital-ide.pl.setSimTop.title": "Set as top file of sim",
+    "digital-ide.pl.addDevice.title": "Add device",
+    "digital-ide.pl.delDevice.title": "Del device",
+    "digital-ide.pl.addFile.title": "Add file",
+    "digital-ide.pl.delFile.title": "Del file",
+    "digital-ide.netlist.title": "Netlist",
+    "digital-ide.fsm.title": "Finite state machine",
+    "digital-ide.lsp.tool.insertTextToUri.title": "Insert text to uri",
+    "digital-ide.lsp.tool.transformOldPropertyFile.title": "Transform configure file from previous version to new version",
+    "digital-ide.vhdl2vlog.title": "Translate vhdl code to verilog code",
+    "digital-ide.fsm.show.title": "Show FSM graph of current file",
+    "digital-ide.netlist.show.title": "Show netlist of current file"
 }

resources/netlist/index.js

@@ -67,7 +67,7 @@ class NetlistKernel {
         for (let i = 0; i < files.length; i++) {
             const file = files[i];
             if (os.platform().toLowerCase() === 'win32') {
-                console.log(this.kernel.FS.readdir('/'));
+                // console.log(this.kernel.FS.readdir('/'));
                 this.exec(`${command} /${file}`);
             } else {
                 this.exec(`${command} /host/${file}`);

resources/netlist/view/render.js

@@ -22,7 +22,7 @@ class render{
 
         document.getElementById("next").onclick = function () {
             if (this.curNetIndex < this.netLists.length-1) {
-                this.curNetIndex++;
+                this.curNetIndex ++;
                 this.showNetlist(this.netLists[this.curNetIndex]);
             }
         };  
@@ -35,15 +35,15 @@ class render{
             this.netLists.push(netList);
         }
 
-        let netnode = this.showTreelist(netList);
+        const netnode = this.showTreelist(netList);
 
-        var setting = {};
-        $(document).ready(function () {
+        const setting = {};
+        $(document).ready(() => {
             this.zTreeObj = $.fn.zTree.init($("#netTree"), setting, netnode);
         });
 
         // remove embed
-        svgPanZoom(this.embed_svg).destroy();
+        // svgPanZoom(this.embed_svg).destroy();
         this.svg = await netlistsvg.render(netlistsvg.digitalSkin, netList);
 
         //Add to container

src/extension.ts

@@ -2,7 +2,7 @@ import * as vscode from 'vscode';
 import * as fs from 'fs';
 import * as fspath from 'path';
 
-import { opeParam, MainOutput, ReportType, AbsPath } from './global';
+import { opeParam, MainOutput, AbsPath } from './global';
 import { hdlParam } from './hdlParser';
 import * as manager from './manager';
 import * as func from './function';
@@ -63,6 +63,9 @@ async function launch(context: vscode.ExtensionContext) {
         
     MainOutput.report('Digital-IDE has launched, Version: 0.3.0');
     MainOutput.report('OS: ' + opeParam.os);
+
+    console.log(hdlParam);
+    
 }
 
 export function activate(context: vscode.ExtensionContext) {

src/function/lsp/completion/vlog.ts

@@ -108,13 +108,17 @@ class VlogMacroCompletionProvider implements vscode.CompletionItemProvider {
 
 class VlogPositionPortProvider implements vscode.CompletionItemProvider {
     public async provideCompletionItems(document: vscode.TextDocument, position: vscode.Position, token: vscode.CancellationToken, context: vscode.CompletionContext): Promise<vscode.CompletionItem[] | vscode.CompletionList<vscode.CompletionItem> | null | undefined> {
-        // console.log('VlogPositionPortProvider');
+        console.log('enter VlogPositionPortProvider');
         
         try {
             const suggestPositionPorts: vscode.CompletionItem[] = [];
             const filePath = hdlPath.toSlash(document.fileName);
             const symbolResult = await vlogSymbolStorage.getSymbol(filePath);
-                    if (!symbolResult) {
+
+            // console.log(symbolResult?.content);
+            // console.log(position.character, position.line);
+            
+            if (!symbolResult) {
                 return null;
             }
 

src/function/lsp/linter/vlog.ts

@@ -14,7 +14,7 @@ class VlogLinter {
     async lint(document: vscode.TextDocument) {
         const filePath = document.fileName;
         const vlogAll = await vlogSymbolStorage.getSymbol(filePath);
-        console.log('lint all finish');
+        // console.log('lint all finish');
         
         if (vlogAll) {
             const diagnostics = this.provideDiagnostics(document, vlogAll);

src/function/lsp/util/index.ts

@@ -203,6 +203,7 @@ function filterInstanceByPosition(position: vscode.Position, symbols: RawSymbol[
     }
     for (const symbol of symbols) {
         const inst = module.getInstance(symbol.name);
+                
         if (positionAfterEqual(position, symbol.range.start) && 
             positionAfterEqual(symbol.range.end, position) &&
             inst) {

src/function/netlist/index.ts

@@ -2,7 +2,7 @@ import * as vscode from 'vscode';
 import * as fspath from 'path';
 
 import { NetlistKernel } from '../../../resources/netlist';
-import { MainOutput, opeParam, ReportType, YosysOutput } from '../../global';
+import { opeParam, ReportType, YosysOutput } from '../../global';
 import { hdlParam } from '../../hdlParser';
 import { hdlFile, hdlPath } from '../../hdlFs';
 
@@ -54,6 +54,7 @@ class Netlist {
             }
         });
 
+        prjFiles.forEach(file => YosysOutput.report('feed file: ' + file, ReportType.Debug));
         this.kernel.load(prjFiles);
         this.create();
     }

src/function/sim/simulate.ts

@@ -216,7 +216,7 @@ class IcarusSimulate extends Simulate {
         const outVvpPath = '"' + hdlPath.join(simConfig.simulationHome, 'out.vvp') + '"';      
         const mainPath = '"' + path + '"';
 
-        const cmd = `${iverilogPath} ${argu} -o ${outVvpPath} -s ${name} ${macroIncludeArgs} ${mainPath} ${dependenceArgs} ${thirdLibraryArgs}`;
+        const cmd = `${iverilogPath} ${argu} -o ${outVvpPath} -s ${name} ${macroIncludeArgs} ${thirdLibraryArgs} ${mainPath} ${dependenceArgs}`;
         MainOutput.report(cmd, ReportType.Run);
         return cmd;
     }

src/global/prjInfo.ts

@@ -58,15 +58,15 @@ const PrjInfoDefaults: PrjInfoMeta = {
     
     get arch() {
         return {
-            prjPath: '.',
+            prjPath: '',
             hardware: {
-                src: '.',
-                sim: '.',
-                data: '.'
+                src: '',
+                sim: '',
+                data: ''
             },
             software: {
-                src: '.',
-                data: '.'
+                src: '',
+                data: ''
             }
         };
     },
@@ -476,7 +476,7 @@ class PrjInfo implements PrjInfoMeta {
             if (iverilogCompileOptions.standard) {
                 this._iverilogCompileOptions.standard = iverilogCompileOptions.standard;
             }
-            if (iverilogCompileOptions.includes && iverilogCompileOptions.includes instanceof Array<Path>) {
+            if (iverilogCompileOptions.includes && iverilogCompileOptions.includes instanceof Array) {
                 this._iverilogCompileOptions.includes = [];
                 for (const includePath of iverilogCompileOptions.includes) {
                     const realIncludePath = includePath.replace(/\$\{workspace\}/g, this._workspacePath);
@@ -567,19 +567,26 @@ class PrjInfo implements PrjInfoMeta {
 
     public get hardwareSimPath(): AbsPath {
         const simPath = this._arch.hardware.sim;  
+        const workspace = this._workspacePath;
         if (fspath.isAbsolute(simPath)) {
             return simPath;
+        } else if (simPath === '') {
+            return workspace;
         }
-        const workspace = this._workspacePath;
         return hdlPath.join(workspace, simPath);
     }
 
     public get hardwareSrcPath(): AbsPath {
         const srcPath = this._arch.hardware.src;
+        const workspace = this._workspacePath;
+
         if (fspath.isAbsolute(srcPath)) {
             return srcPath;
+        } else if (srcPath === '') {
+            return workspace;
         }
-        const workspace = this._workspacePath;
+        console.log(hdlPath.join(workspace, srcPath));
+        
         return hdlPath.join(workspace, srcPath);
     }
 

src/test/user/Hardware/src/Cordic.v

@@ -16,7 +16,6 @@ module Cordic #(
 	output  signed [XY_BITS-1:0] x_o,
 	output  signed [XY_BITS-1:0] y_o,
 	output  signed [PH_BITS-1:0] phase_out,
-
 	input   valid_in,
 	output  valid_out
 );

syntaxes/verilog.tmLanguage.json

@@ -10,10 +10,10 @@
             "include": "#comments"
         },
         {
-            "include": "#module_pattern"
+            "include": "#keywords"
         },
         {
-            "include": "#keywords"
+            "include": "#module_pattern"
         },
         {
             "include": "#constants"
@@ -125,7 +125,7 @@
                             "name": "punctuation.terminator.expression.verilog"
                         }
                     },
-                    "name": "meta.block.instantiation.parameterless.verilog",
+                    "name": "variable.other.constant.instantiation.parameterless.verilog",
                     "patterns": [
                         {
                             "include": "#comments"