8 lines
459 B
Tcl
8 lines
459 B
Tcl
set_param general.maxThreads 8
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create_project template d:/Project/FPGA/Design/TCL_project/Test/Efinity/prj/xilinx -part none -force
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set_property SOURCE_SET sources_1 [get_filesets sim_1]
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set_property top_lib xil_defaultlib [get_filesets sim_1]
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update_compile_order -fileset sim_1 -quiet
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source d:/Project/Code/.prj/Digital-IDE/resources/script/xilinx/refresh.tcl -quiet
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file delete d:/Project/Code/.prj/Digital-IDE/resources/script/xilinx/launch.tcl -force
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