fix write error

src/completion/vhdl.rs

@@ -24,7 +24,7 @@ pub fn completion(server: &LSPServer, params: &CompletionParams) -> Option<Compl
     };
     let escape_path = to_escape_path(&path);
 
-    let project = match projects.get("VHDL_Project") {
+    let project = match projects.get("VHDLProject") {
         Some(project) => project,
         None => return None
     };

src/definition/vhdl.rs

@@ -20,7 +20,7 @@ pub fn goto_vhdl_definition(server: &LSPServer, params: &GotoDefinitionParams) -
     };
     let escape_path = to_escape_path(&path);
 
-    let project = match projects.get("VHDL_Project") {
+    let project = match projects.get("VHDLProject") {
         Some(project) => project,
         None => return None
     };

src/document_highlight/vhdl.rs

@@ -23,7 +23,7 @@ pub fn vhdl_document_highlight(
     };
     let escape_path = to_escape_path(&path);
 
-    let project = match projects.get("VHDL_Project") {
+    let project = match projects.get("VHDLProject") {
         Some(project) => project,
         None => return None
     };

src/document_symbol/vhdl.rs

@@ -22,7 +22,7 @@ pub fn vhdl_document_symbol(server: &LSPServer, params: &DocumentSymbolParams) -
     };
     let escape_path = to_escape_path(&path);
 
-    let project = match projects.get("VHDL_Project") {
+    let project = match projects.get("VHDLProject") {
         Some(project) => project,
         None => return None
     };

src/hover/vhdl.rs

@@ -22,7 +22,7 @@ pub fn hover(server: &LSPServer, params: &HoverParams) -> Option<Hover> {
     };
     let escape_path = to_escape_path(&path);
 
-    let project = match projects.get("VHDL_Project") {
+    let project = match projects.get("VHDLProject") {
         Some(project) => project,
         None => return None
     };

src/sources.rs

@@ -628,7 +628,7 @@ pub fn vhdl_parser_pipeline(
             project.add_file(&escape_path, &mut msg_printer);
         } else {
             let project = vhdl_lang::Project::new_without_config(&escape_path, &mut msg_printer, None);
-            design_files.insert("VHDL_Project".to_string(), project);
+            design_files.insert("VHDLProject".to_string(), project);
         }
     }
 }