kirigaya/digital-lsp-server
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Merge branch 'main' of https://github.com/Digital-EDA/digital-lsp-server

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This commit is contained in:
锦恢 2024-10-05 00:12:45 +08:00
commit 394564e0cc
6 changed files with 6 additions and 6 deletions
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2
src/completion/vhdl.rs
View File

@ -24,7 +24,7 @@ pub fn completion(server: &LSPServer, params: &CompletionParams) -> Option<Compl
}; };
let escape_path = to_escape_path(&path); let escape_path = to_escape_path(&path);
let project = match projects.get("VHDL_Project") { let project = match projects.get("VHDLProject") {
Some(project) => project, Some(project) => project,
None => return None None => return None
}; };

2
src/definition/vhdl.rs
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@ -20,7 +20,7 @@ pub fn goto_vhdl_definition(server: &LSPServer, params: &GotoDefinitionParams) -
}; };
let escape_path = to_escape_path(&path); let escape_path = to_escape_path(&path);
let project = match projects.get("VHDL_Project") { let project = match projects.get("VHDLProject") {
Some(project) => project, Some(project) => project,
None => return None None => return None
}; };

2
src/document_highlight/vhdl.rs
View File

@ -23,7 +23,7 @@ pub fn document_highlight(
}; };
let escape_path = to_escape_path(&path); let escape_path = to_escape_path(&path);
let project = match projects.get("VHDL_Project") { let project = match projects.get("VHDLProject") {
Some(project) => project, Some(project) => project,
None => return None None => return None
}; };

2
src/document_symbol/vhdl.rs
View File

@ -22,7 +22,7 @@ pub fn document_symbol(server: &LSPServer, params: &DocumentSymbolParams) -> Opt
}; };
let escape_path = to_escape_path(&path); let escape_path = to_escape_path(&path);
let project = match projects.get("VHDL_Project") { let project = match projects.get("VHDLProject") {
Some(project) => project, Some(project) => project,
None => return None None => return None
}; };

2
src/hover/vhdl.rs
View File

@ -22,7 +22,7 @@ pub fn hover(server: &LSPServer, params: &HoverParams) -> Option<Hover> {
}; };
let escape_path = to_escape_path(&path); let escape_path = to_escape_path(&path);
let project = match projects.get("VHDL_Project") { let project = match projects.get("VHDLProject") {
Some(project) => project, Some(project) => project,
None => return None None => return None
}; };

2
src/sources.rs
View File

@ -628,7 +628,7 @@ pub fn vhdl_parser_pipeline(
project.add_file(&escape_path, &mut msg_printer); project.add_file(&escape_path, &mut msg_printer);
} else { } else {
let project = vhdl_lang::Project::new_without_config(&escape_path, &mut msg_printer, None); let project = vhdl_lang::Project::new_without_config(&escape_path, &mut msg_printer, None);
design_files.insert("VHDL_Project".to_string(), project); design_files.insert("VHDLProject".to_string(), project);
} }
} }
} }