diff --git a/sv-parser-pp/src/preprocess.rs b/sv-parser-pp/src/preprocess.rs
index de326d1..e0a6c99 100644
--- a/sv-parser-pp/src/preprocess.rs
+++ b/sv-parser-pp/src/preprocess.rs
@@ -1134,6 +1134,23 @@ mod tests {
         );
     } // }}}
 
+    #[test]
+    fn default_nettype() { // {{{
+        let include_paths = [testfile_path("")];
+        let (ret, _) = preprocess(
+            testfile_path("default_nettype.sv"),
+            &HashMap::new(),
+            &include_paths,
+            false,
+            false,
+        )
+        .unwrap();
+        assert_eq!(
+            ret.text(),
+            testfile_contents("default_nettype.sv")
+        );
+    } // }}}
+
     #[test]
     fn ifdef_nested() { // {{{
         let (ret, _) = preprocess(
diff --git a/sv-parser-pp/testcases/default_nettype.sv b/sv-parser-pp/testcases/default_nettype.sv
new file mode 100644
index 0000000..11b23f0
--- /dev/null
+++ b/sv-parser-pp/testcases/default_nettype.sv
@@ -0,0 +1,22 @@
+// IEEE1800-2017 Clause 22.8
+// The directive `default_nettype controls the net type created for implicit
+// net declarations. It can be used only outside design elements. Multiple
+// `default_nettype directives are allowed. The latest occurrence of this
+// directive in the source controls the type of nets that will be implicitly
+// declared.
+// When no `default_nettype directive is present or if the `resetall directive
+// is specified, implicit nets are of type wire. When the `default_nettype is
+// set to none, all nets shall be explicitly declared. If a net is not
+// explicitly declared, an error is generated.
+`default_nettype wire // Comment immmediately after keyword+space
+`default_nettype tri
+`default_nettype tri0
+`default_nettype tri1
+`default_nettype wand
+`default_nettype triand
+`default_nettype wor
+`default_nettype trior
+`default_nettype trireg
+`default_nettype uwire
+`default_nettype none// Comment immmediately after keyword
+// This file should be emitted from the preprocessor unchanged.