kirigaya/sv-parser
1
0
Fork 0
Code Issues Pull Requests Actions 1 Packages Projects Releases Wiki Activity

Prepare to v0.4.6 of sv-parser

Browse Source
This commit is contained in:
dalance 2019-12-02 11:53:56 +09:00
parent 769fc195c5
commit 77ebb2b45c
3 changed files with 5 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
CHANGELOG.md
View File

@ -1,6 +1,8 @@
# Change Log
## [Unreleased](https://github.com/dalance/sv-parser/compare/v0.4.5...Unreleased) - ReleaseDate
## [Unreleased](https://github.com/dalance/sv-parser/compare/v0.4.6...Unreleased) - ReleaseDate
## [v0.4.6](https://github.com/dalance/sv-parser/compare/v0.4.5...v0.4.6) - 2019-12-02
* [Fix] constant_bit_select
* [Fix] wrong linebreak at define macro usage

2
README.md
View File

@ -14,7 +14,7 @@ SystemVerilog parser library fully complient with [IEEE 1800-2017](https://stand
```Cargo.toml
[dependencies]
sv-parser = "0.4.5"
sv-parser = "0.4.6"
```
sv-parser provides [`parse_sv`](https://docs.rs/sv-parser/latest/sv_parser/fn.parse_sv.html) function which returns [`SyntaxTree`](https://docs.rs/sv-parser/latest/sv_parser/struct.SyntaxTree.html).

2
sv-parser/Cargo.toml
View File

@ -1,6 +1,6 @@
[package]
name = "sv-parser"
version = "0.4.5"
version = "0.4.6"
authors = ["dalance@gmail.com"]
repository = "https://github.com/dalance/sv-parser"
keywords = ["parser", "verilog", "systemverilog"]