diff --git a/CHANGELOG.md b/CHANGELOG.md index c08d17d..55488c7 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -2,6 +2,8 @@ ## [Unreleased](https://github.com/dalance/sv-parser/compare/v0.4.5...Unreleased) - ReleaseDate +* [Fix] wrong linebreak at define macro usage + ## [v0.4.5](https://github.com/dalance/sv-parser/compare/v0.4.4...v0.4.5) - 2019-11-28 * [Fix] wrong space at define macro usage diff --git a/sv-parser-pp/src/preprocess.rs b/sv-parser-pp/src/preprocess.rs index 1a24ce7..f833ddd 100644 --- a/sv-parser-pp/src/preprocess.rs +++ b/sv-parser-pp/src/preprocess.rs @@ -493,9 +493,9 @@ fn resolve_text_macro_usage, U: AsRef>( .replace("``", "") .replace("`\\`\"", "\\\"") .replace("`\"", "\"") - .replace("\\\n", "") - .replace("\\\r\n", "") - .replace("\\\r", ""), + .replace("\\\n", "\n") + .replace("\\\r\n", "\r\n") + .replace("\\\r", "\r"), ); } } @@ -616,7 +616,9 @@ endmodule module a (); - assign a_0__x = a[0].x; assign a_0__y = a[0].y; assign a_1__x = a[1].x; assign a_1__y = a[1].y; endmodule + assign a_0__x = a[0].x; + assign a_0__y = a[0].y; assign a_1__x = a[1].x; + assign a_1__y = a[1].y; endmodule "## ); } @@ -630,8 +632,13 @@ module a (); r##" module a (); -always @(posedge clk) begin if (!(!(a[i].b && c[i]))) begin $display ("xxx(()[]]{}}}", a[i].b, c[i]) -; end end ; +always @(posedge clk) begin + if (!(!(a[i].b && c[i]))) begin + $display ("xxx(()[]]{}}}", a[i].b, c[i]) +; + end + end + ; endmodule "##