sv-parser/sv-parser-pp/testcases/include_ignore.sv
damc bd1fc19ee8 ppTests Rename test2.svh -> included.svh
- 19 pass, 9 fail due to whitespace.
- All failures are suspected bugs.
2022-07-21 13:51:51 +02:00

4 lines
59 B
Systemverilog

module and_op (a, b, c);
`include "included.svh"
endmodule