9 lines
594 B
Plaintext
9 lines
594 B
Plaintext
0.6
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2018.3
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Dec 7 2018
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00:33:28
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C:/Users/11934/Project/Digital-IDE/Digital-Test/lsp/linter/child_1.v,1696688297,verilog,,,,dependence_1,,,,,,,,
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C:/Users/11934/Project/Digital-IDE/Digital-Test/lsp/linter/child_2.v,1696688297,verilog,,,,dependence_2,,,,,,,,
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C:/Users/11934/Project/Digital-IDE/Digital-Test/lsp/linter/dsp.vhd,1692686802,vhdl,,,,dsp,,,,,,,,
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C:/Users/11934/Project/Digital-IDE/Digital-Test/lsp/linter/parent.v,1700548652,verilog,,,C:/Users/11934/Project/Digital-IDE/Digital-Test/lsp/linter/child_1.v;C:/Users/11934/Project/Digital-IDE/Digital-Test/lsp/linter/child_2.v,Main,,,,,,,,
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