fix clean command

This commit is contained in:
Nitcloud 2025-03-16 15:11:48 +08:00
parent c6cc9fcdb4
commit b949289ece
3 changed files with 6 additions and 26 deletions

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@ -1,7 +0,0 @@
set_param general.maxThreads 8
create_project template d:/Project/FPGA/Design/TCL_project/Test/Efinity/prj/xilinx -part none -force
set_property SOURCE_SET sources_1 [get_filesets sim_1]
set_property top_lib xil_defaultlib [get_filesets sim_1]
update_compile_order -fileset sim_1 -quiet
source d:/Project/Code/.prj/Digital-IDE/resources/script/xilinx/refresh.tcl -quiet
file delete d:/Project/Code/.prj/Digital-IDE/resources/script/xilinx/launch.tcl -force

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@ -1,17 +0,0 @@
remove_files -quiet [get_files]
set xip_repo_paths {}
set_property ip_repo_paths $xip_repo_paths [current_project] -quiet
update_ip_catalog -quiet
add_file d:/Project/FPGA/Design/TCL_project/Test/Efinity/user/src/async_fifo.v -quiet
add_file d:/Project/FPGA/Design/TCL_project/Test/Efinity/user/src/DPRAM.v -quiet
add_file d:/Project/FPGA/Design/TCL_project/Test/Efinity/user/src/ecc_decode.sv -quiet
add_file d:/Project/FPGA/Design/TCL_project/Test/Efinity/user/src/ecc_encode.sv -quiet
add_file d:/Project/FPGA/Design/TCL_project/Test/Efinity/user/src/ecc_pkg.sv -quiet
add_file d:/Project/FPGA/Design/TCL_project/Test/Efinity/user/src/hbram/hbram_controller.v -quiet
add_file d:/Project/FPGA/Design/TCL_project/Test/Efinity/user/src/hbram/hbram_ctrl.v -quiet
add_file d:/Project/FPGA/Design/TCL_project/Test/Efinity/user/src/hbram/hyper_bus.v -quiet
add_file d:/Project/FPGA/Design/TCL_project/Test/Efinity/user/src/hbram_test.v -quiet
add_file d:/Project/FPGA/Design/TCL_project/Test/Efinity/user/src/spi_slave.v -quiet
add_file d:/Project/FPGA/Design/TCL_project/Test/Efinity/user/src/test.v -quiet
add_files -fileset constrs_1 d:/Project/FPGA/Design/TCL_project/Test/Efinity/user/data -quiet
file delete d:/Project/Code/.prj/Digital-IDE/resources/script/xilinx/refresh.tcl -force

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@ -245,8 +245,12 @@ export async function clean() {
const plName = opeParam.prjInfo.prjName.PL; const plName = opeParam.prjInfo.prjName.PL;
const targetPath = fspath.dirname(opeParam.prjInfo.arch.hardware.src); const targetPath = fspath.dirname(opeParam.prjInfo.arch.hardware.src);
const sourceIpPath = `${workspacePath}/prj/xilinx/${plName}.srcs/sources_1/ip`; let type = 'srcs';
const sourceBdPath = `${workspacePath}/prj/xilinx/${plName}.srcs/sources_1/bd`; if (hdlDir.isDir(`${workspacePath}/prj/xilinx/${plName}.gen`)) {
type = 'gen';
}
const sourceIpPath = `${workspacePath}/prj/xilinx/${plName}.${type}/sources_1/ip`;
const sourceBdPath = `${workspacePath}/prj/xilinx/${plName}.${type}/sources_1/bd`;
hdlDir.mvdir(sourceIpPath, targetPath, true); hdlDir.mvdir(sourceIpPath, targetPath, true);
MainOutput.report("move dir from " + sourceIpPath + " to " + targetPath); MainOutput.report("move dir from " + sourceIpPath + " to " + targetPath);