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锦恢 2024-09-22 21:44:04 +08:00
parent b6708d3278
commit e363c4c50b
6 changed files with 78 additions and 6 deletions
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7
resources/script/xilinx/launch.tcl Normal file
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@ -0,0 +1,7 @@
set_param general.maxThreads 8
create_project template /home/dide/project/Digital-Test/MipsDesign/prj/xilinx -part none -force
set_property SOURCE_SET source_1 [get_filesets sim_1]
set_property top_lib xil_defaultlib [get_filesets sim_1]
update_compile_order -fileset sim_1 -quiet
source /home/dide/project/Digital-IDE/resources/script/xilinx/refresh.tcl -quiet
file delete /home/dide/project/Digital-IDE/resources/script/xilinx/launch.tcl -force

55
resources/script/xilinx/refresh.tcl Normal file
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@ -0,0 +1,55 @@
remove_files -quiet [get_files]
set xip_repo_paths {}
set_property ip_repo_paths $xip_repo_paths [current_project] -quiet
update_ip_catalog -quiet
add_files /home/dide/project/Digital-Test/MipsDesign/src/Controller/controller.v -quiet
add_files -fileset sim_1 /home/dide/project/Digital-Test/MipsDesign/src/Controller/controller.v -quiet
add_files /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Hazard/ForwardUnit.v -quiet
add_files -fileset sim_1 /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Hazard/ForwardUnit.v -quiet
add_files /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Hazard/HDU.v -quiet
add_files -fileset sim_1 /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Hazard/HDU.v -quiet
add_files /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Memory/dm_8k.v -quiet
add_files -fileset sim_1 /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Memory/dm_8k.v -quiet
add_files /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Memory/im_8k.v -quiet
add_files -fileset sim_1 /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Memory/im_8k.v -quiet
add_files /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Pipe/EX_MEM.v -quiet
add_files -fileset sim_1 /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Pipe/EX_MEM.v -quiet
add_files /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Pipe/ID_EX.v -quiet
add_files -fileset sim_1 /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Pipe/ID_EX.v -quiet
add_files /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Pipe/IF_ID.v -quiet
add_files -fileset sim_1 /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Pipe/IF_ID.v -quiet
add_files /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Pipe/MEM_WB.v -quiet
add_files -fileset sim_1 /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Pipe/MEM_WB.v -quiet
add_files /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Utils/BU.v -quiet
add_files -fileset sim_1 /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Utils/BU.v -quiet
add_files /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Utils/Ext.v -quiet
add_files -fileset sim_1 /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Utils/Ext.v -quiet
add_files /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Utils/FU.v -quiet
add_files -fileset sim_1 /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Utils/FU.v -quiet
add_files /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Utils/OR.v -quiet
add_files -fileset sim_1 /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Utils/OR.v -quiet
add_files /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Utils/alu.v -quiet
add_files -fileset sim_1 /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Utils/alu.v -quiet
add_files /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Utils/alu_ctrl.v -quiet
add_files -fileset sim_1 /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Utils/alu_ctrl.v -quiet
add_files /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Utils/mux.v -quiet
add_files -fileset sim_1 /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Utils/mux.v -quiet
add_files /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Utils/npc.v -quiet
add_files -fileset sim_1 /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Utils/npc.v -quiet
add_files /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Utils/pc.v -quiet
add_files -fileset sim_1 /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Utils/pc.v -quiet
add_files /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Utils/pc_add.v -quiet
add_files -fileset sim_1 /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Utils/pc_add.v -quiet
add_files /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Utils/regfile.v -quiet
add_files -fileset sim_1 /home/dide/project/Digital-Test/MipsDesign/src/DataPath/Utils/regfile.v -quiet
add_files /home/dide/project/Digital-Test/MipsDesign/src/DataPath/datapath.v -quiet
add_files -fileset sim_1 /home/dide/project/Digital-Test/MipsDesign/src/DataPath/datapath.v -quiet
add_files /home/dide/project/Digital-Test/MipsDesign/src/MyCpu.v -quiet
add_files -fileset sim_1 /home/dide/project/Digital-Test/MipsDesign/src/MyCpu.v -quiet
add_files -fileset sim_1 /home/dide/project/Digital-Test/MipsDesign/sim/testBench.v -quiet
add_files -fileset sim_1 /home/dide/project/Digital-IDE/library/Apply/Comm/FDE/AGC/AGC.v -quiet
add_files -fileset sim_1 /home/dide/project/Digital-IDE/library/Apply/Comm/MDS/Modulation/AnalogMod.v -quiet
add_files -fileset sim_1 /home/dide/project/Digital-IDE/library/Apply/Comm/MDS/Modulation/DigitalMod.v -quiet
add_files -fileset sim_1 /home/dide/project/Digital-IDE/library/Basic/Math/FixedPoint/accuml.v -quiet
add_files -fileset constrs_1 /home/dide/project/Digital-Test/MipsDesign -quiet
file delete /home/dide/project/Digital-IDE/resources/script/xilinx/refresh.tcl -force

2
script/test/svlogAll.js
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@ -4,5 +4,5 @@ const testFile = '../Digital-Test/svlog/user/src/hello.sv';
(async () => {
const all = await svAll(testFile);
console.log(JSON.stringify(all, null, ' '));
(JSON.stringify(all, null, ' '));
})();

1
src/function/hdlDoc/diagram.ts
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@ -190,7 +190,6 @@ function makeRightDirection(rightPorts: HdlModulePort[]): string {
const portCaption = makePortCaption(port, 'right');
let portArrow = makePortArrow(port, 'right');
portArrow = portArrow.replace('-0.5 -0.5 125 45', '20 -0.5 125 45');
console.log(portArrow);
const arrow = `<div class="arrow-wrapper">${portCaption}${portArrow}</div>`;
rightDirection += arrow;

8
src/function/hdlDoc/markdown.ts
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@ -48,7 +48,6 @@ function selectFieldValue(obj: any, subName: string, ws: string, name: string):
function makeTableFromObjArray(md: MarkdownString, array: any[], name: string, fieldNames: string[], displayNames: string[]) {
const ws = hdlPath.toSlash(opeParam.workspacePath) + '/';
console.log('enter showhtml');
if (array.length === 0) {
md.addText(`no ${name} info`);
@ -82,14 +81,17 @@ async function patchComment(path: AbsPath, ports: (HdlModulePort | HdlModulePara
}
const ranges = ports.map(port => port.range);
const comments = await getSymbolComments(path, ranges);
console.log(ranges);
for (let i = 0; i < ports.length; ++ i) {
let inlineComment = comments[i].replace(/\n/, ' ');
let inlineComment = comments[i]
.replace(/\n\n/g, '<br>')
.replace(/\n/g, '<br>')
if (inlineComment.startsWith('//') || inlineComment.startsWith('--')) {
inlineComment = inlineComment.substring(2);
}
ports[i].desc = inlineComment;
console.log(inlineComment);
}
}

11
src/function/lsp/util/feature.ts
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@ -395,7 +395,16 @@ async function getSymbolComments(path: string, ranges: Range[]): Promise<string[
const commentPromises = [];
const comments = [];
for (const range of ranges) {
const commentP = getFullSymbolInfo(document, range, nonblank, l_comment_symbol, l_comment_regExp);
// TODO: 后端修改后移除这里
const adjustRange: Range = {
start: {
line: range.start.line - 1,
character: range.start.character
},
end: range.end
};
const commentP = getFullSymbolInfo(document, adjustRange, nonblank, l_comment_symbol, l_comment_regExp);
commentPromises.push(commentP);
}