Kirigaya cf722bfbee #fix sim args process

2023-08-15 17:21:40 +08:00

..

arm.json

initialize

2023-01-20 15:16:35 +08:00

digital-ide-output.json

update

2023-03-28 22:44:06 +08:00

link.json

initialize

2023-01-20 15:16:35 +08:00

systemverilog.json

initialize

2023-01-20 15:16:35 +08:00

tcl.json

initialize

2023-01-20 15:16:35 +08:00

verilog.json

#fix hover | #fix completion

2023-07-07 02:29:43 +08:00

verilog.tmLanguage.json

#fix sim args process

2023-08-15 17:21:40 +08:00

vhdl.json

initialize

2023-01-20 15:16:35 +08:00