ppTests Extend non-IEEE tests around macros.

This commit is contained in:
damc 2022-07-21 21:39:21 +02:00
parent 1be39f0ce9
commit 28cbd8aaf4
16 changed files with 160 additions and 88 deletions

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// Macro with parameters with usage spread over multiple lines.
// Final line of macro is line14.
// Argument value `clk` is equal to its name.
// Argument value of exp contains matching brackets and parentheses.
// Bracketed value of msg is required to avoid being parsed as a parameterized
// macro instead of argumnts to $display.
// NOTE: Trailing whitespace is not exercised here, i.e. continuations
// immediately follow non-whitespace.
`define disp(clk, exp, msg)\
always @(posedge clk)\
if (exp) begin\
$display msg;\
end\
module M ();
always @(posedge clk)
if (!(a[i].b && c[i])) begin
$display ("xxx(()[]]{}}}", a[i].b, c[i]);
end
; // NOTE: Semi-colon is unnecessary.
endmodule

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`define MOD_INST u_mysubmod `define A aaa
module mymod; module M;
mysubmod u_mysubmod() ; aaa#() a0 (.*); // No trailing whitespace.
aaa #() a1 (.*); // Trailing 1 space.
aaa #() a2 (.*); // Trailing 2 spaces.
endmodule endmodule

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`define A 42 // Comment /* IEEE1800-2017 Clause 22.5.1, page 676
interface i #(p = 42) (); endinterface If a one-line comment (that is, a comment specified with the characters //) is
included in the text, then the comment shall not become part of the substituted
text.
*/
// A has no comment
// B has a comment after 1 space
// C has a comment after 3 spaces
`define A 11
`define B 22 // Comment not included in macro, but whitespace before `//` is.
`define C 33 // Comment not included in macro, but whitespace before `//` is.
interface A #(p=11) (); endinterface
interface B #(p=22 ) (); endinterface
interface C #(p=33 ) (); endinterface

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// Multi-line macro defined with 2 trailing spaces before initial continuation.
// First line has no trailing space, second has trailing space, third is end.
// Macro contains 2-space indent, so indented usage gets extra.
// Delimiters (``) used before and after arguments.
`define connect(NAME, INDEX = 0) \
assign NAME``_``INDEX``__x = NAME[INDEX].x;\
assign NAME``_``INDEX``__y = NAME[INDEX].y; \
assign NAME``_``INDEX``__z = NAME[INDEX].z;
module M ();
assign a_0__x = a[0].x;
assign a_0__y = a[0].y;
assign a_0__z = a[0].z;
assign a_1__x = a[1].x;
assign a_1__y = a[1].y;
assign a_1__z = a[1].z;
endmodule

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module a;
`define A "aaa" `define A "aaa"
`define \B "bbb" `define \B "bbb"
module M;
initial begin initial begin
$display("aaa"); $display("aaa");
$display("aaa" ); $display("aaa" );

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// Leading whitespace on 4 lines.
// initial \ Space before line continuation.
// begin\ No space before line continuation.
// $display(); // comment \ Continuation at end of comment.
// end
// NOTE: Trailing whitespace on lines ending `initial ` and `$display(); `.
`define A \ `define A \
initial begin // comment \ initial \
begin\
$display(); // comment \
end end
module test(); module M;
initial
initial begin begin
$display();
end end
endmodule endmodule

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`define connect(NAME, INDEX = 0) \
assign NAME``_``INDEX``__x = NAME[INDEX].x; \
assign NAME``_``INDEX``__y = NAME[INDEX].y;
module a ();
assign a_0__x = a[0].x;
assign a_0__y = a[0].y; assign a_1__x = a[1].x;
assign a_1__y = a[1].y; endmodule

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`define disp(clk, exp, msg) \
always @(posedge clk) begin \
if (!(exp)) begin \
$display msg; \
end \
end \
module a ();
always @(posedge clk) begin
if (!(!(a[i].b && c[i]))) begin
$display ("xxx(()[]]{}}}", a[i].b, c[i]);
end
end
;
endmodule

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// Macro with parameters with usage spread over multiple lines.
// Final line of macro is line14.
// Argument value `clk` is equal to its name.
// Argument value of exp contains matching brackets and parentheses.
// Bracketed value of msg is required to avoid being parsed as a parameterized
// macro instead of argumnts to $display.
// NOTE: Trailing whitespace is not exercised here, i.e. continuations
// immediately follow non-whitespace.
`define disp(clk, exp, msg)\
always @(posedge clk)\
if (exp) begin\
$display msg;\
end\
module M ();
`disp(
clk,
!(a[i].b && c[i]),
("xxx(()[]]{}}}", a[i].b, c[i])
); // NOTE: Semi-colon is unnecessary.
endmodule

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`define MOD_INST u_mysubmod `define A aaa
module mymod; module M;
mysubmod `MOD_INST (); `A#() a0 (.*); // No trailing whitespace.
`A #() a1 (.*); // Trailing 1 space.
`A #() a2 (.*); // Trailing 2 spaces.
endmodule endmodule

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`define A 42 // Comment /* IEEE1800-2017 Clause 22.5.1, page 676
interface i #(p = `A) (); endinterface If a one-line comment (that is, a comment specified with the characters //) is
included in the text, then the comment shall not become part of the substituted
text.
*/
// A has no comment
// B has a comment after 1 space
// C has a comment after 3 spaces
`define A 11
`define B 22 // Comment not included in macro, but whitespace before `//` is.
`define C 33 // Comment not included in macro, but whitespace before `//` is.
interface A #(p=`A) (); endinterface
interface B #(p=`B) (); endinterface
interface C #(p=`C) (); endinterface

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// Multi-line macro defined with 2 trailing spaces before initial continuation.
// First line has no trailing space, second has trailing space, third is end.
// Macro contains 2-space indent, so indented usage gets extra.
// Delimiters (``) used before and after arguments.
`define connect(NAME, INDEX = 0) \
assign NAME``_``INDEX``__x = NAME[INDEX].x;\
assign NAME``_``INDEX``__y = NAME[INDEX].y; \
assign NAME``_``INDEX``__z = NAME[INDEX].z;
module M ();
`connect(a)
`connect(a, 1)
endmodule

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module a;
`define A "aaa" `define A "aaa"
`define \B "bbb" `define \B "bbb"
module M;
initial begin initial begin
$display(`A); $display(`A);
$display(`\A ); $display(`\A );

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// Leading whitespace on 4 lines.
// initial \ Space before line continuation.
// begin\ No space before line continuation.
// $display(); // comment \ Continuation at end of comment.
// end
// NOTE: Trailing whitespace on lines ending `initial ` and `$display(); `.
`define A \ `define A \
initial begin // comment \ initial \
begin\
$display(); // comment \
end end
module test(); module M;
`A `A
endmodule endmodule

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`define connect(NAME, INDEX = 0) \
assign NAME``_``INDEX``__x = NAME[INDEX].x; \
assign NAME``_``INDEX``__y = NAME[INDEX].y;
module a ();
`connect(a)
`connect(a, 1)
endmodule

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`define disp(clk, exp, msg) \
always @(posedge clk) begin \
if (!(exp)) begin \
$display msg; \
end \
end \
module a ();
`disp(
clk,
!(a[i].b && c[i]),
("xxx(()[]]{}}}", a[i].b, c[i])
);
endmodule